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Intel buys QLogic InfiniBand business

Fri, 27 Jan 2012 15:09:57 -0800 Post Comments

today announced a definitive agreement to sell the product lines ... associated with its InfiniBand business to Intel Corporation ..."

So "the product lines" means both the switch and HCA product lines.

Last summer Intel acquired an Ethernet switch business: http://newsroom.intel.com/community/intel_newsroom/blog/2011[..]
so it is not unprecedented that they are interested in switching as well as host technologies.

-Tom

If it is, then you should note that it's not

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Hi Joe,

Not sure if this is the issue, but for best latency benchmark performance, we recommend turning all C-states off in the BIOS.  If it cannot be done there, you can add the kernel boot option: processor.max_cstate=0
and reboot.

With C-states turned on, there is high and very variable MPI/IB latency measured if the benchmark is running on CPU0, the default, since extra OS interrupts are being serviced on CPU0.

Once you've turned them off,
You can look at these files:
    /proc/acpi/processor/*/power
to make sure that only state C1 is being used in the list of
states at the end.

I think we've also seen this affecting throughput benchmarks.  Again, I'm not sure if this affects GigE.

-Tom

This message and any attached documents contain information from QLogic Corporation or its wholly-owned subsidiaries that may be confidential. If you are not the intended recipient, you may not read, copy, distribute, or use this information. If you have received this transmission in error, please notify the sender immediately by reply e-mail and then delete this message.
The results are not published anywhere, nor will they be since they were run on pre-production hardware covered by NDAs.  But I can provide some background on the benchmarks and the decision process.

The TLCC2 RFP asked responders to provide ...
" the compute node delivered MPI bandwidth, latency and messaging throughput benchmarks over IBA 4x QDR (or faster) HCA attached to PCIe2 (or faster) buss between two nodes utilizing 1 MPI task/node, 1 MPI task/socket and 1 MPI task/core on each node."

QLogic provided these benchmark results to the OEMs/resellers that were bidding using the following benchmarks: osu_mbw_mr (the OSU Micro-Benchmark's Multi-bandwidth, Message Rate test) osu_multi_lat (Multiple latency: single or parallel latency tests between two nodes), LLNL's SQMR (Sequoia Message Rate) and osu_bw (OSU bandwidth).

But some of the most important benchmarks were run later, in the final stages of making an interconnect decision, on a test cluster using the Intel Sandy Bridge CPUs with both QLogic and the competition's IB HCAs and switches.  So the only difference was the IB hardware and the SW stacks to support them.  To make their decision, the Tri-labs looked at technical risks, schedule risks, and ran their synthetic workload benchmarks (which also contained the microbenchmarks mentioned) on the test cluster to evaluate functionality, performance, and stability to help make their decision.

-Tom Elken

This message and any attached documents contain information from QLogic Corporation or its wholly-owned subsidiaries that may be confidential. If you are not the intended recipient, you may not read, copy, distribute, or use this information. If you have received this transmission in error, please notify the sender immediately by reply e-mail and then delete this message.
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